Preprint / Version 1

BEAM or MFA I inspired Nv Neurons using SPI and a MCU for line and line based polygon detection.

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DOI:

https://doi.org/10.31224/osf.io/9c6ku

Keywords:

Emergent A.I, MCU, MFA I and II architectures, neuromodulation, procedural A.I, SoC, SPI bus., Tensor Architectures, Tensor Flow, TOMU/WOMU, Unsupervised Learning

Abstract

Abstract: A companion publication to an opamp based Nv neuron architecture paper, this publication explores the use of inexpensive mouse optical sensors for shape recognition as polygons from line recognition networks, in sensor and two motor fusion in a TOMU/WOMU circuit using the SPI bus and a master -slave architecture. Lie Computability, is defined on discrete Tensor architectures, similar to computation on fields, in future work, field computing is proven to have the same complexity as integer lattices, though Lie Lattices embeddings in integer and complex lattices, proving MFA I and II architectures are equivalent in complexity, in both analog and digital worlds. Keywords: Tensor Flow, Tensor Architectures, Unsupervised Learning, Emergent A.I , procedural A.I, MFA I and II architectures, neuromodulation, MCU, SoC , TOMU/WOMU, SPI bus. What: We consider inexpensive 18 by 18 matrix 64 gray levels SPI interface, based photodetector components of optical mice. In this paper we consider the use of the SPI interface for the use of a master slave system of interface of an MCU to the optic processor for creating of BEAM circuitry using inexpensive MCU circuitry, such as the TOMU/WOMU. How: MFA I and MFA II architectures are fulfilled in both digital and analog circuitry, with a network architecture defined by a tensor notation, as described in a companion paper. Why: A digital fulfilment of a tensor architecture is defined and compared to Lego Mindstorm based deep learning and procedural algorithms for semantic segmentation and classification algorithms.

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Posted

2020-06-15