Tunable Gamma-Rays in a Thermal Fission Environment for Microelectronics Testing

Abstract

This work develops a method to tailor the radiation environment of a low-power thermal research reactor to enable earlier, lower-cost screening during microelectronic design. Test casings of pure copper, indium, and cadmium, and of the same metals suspended in paraffin, were selected using a first-principles figure of merit that weights prompt (n,γ) emission by the mass energy-absorption coefficient of silicon, then modeled in MCNP6.3 and irradiated in the Purdue University Reactor Number One (PUR-1). Photon dose in silicon, derived from TLD-600/700 pairs via Burlin cavity theory, and 1-MeV equivalent fluence, obtained from foil activation and SAND-II unfolding, show that the casings tune the gamma-to-neutron balance across a factor of seven, from 39× to 278× the ratio permitted by MIL-STD-883, with the best configuration delivering 32 rad(Si)/s at full reactor power. Because the drop tube at its present location is already gamma-dominated by a factor of 46 without any casing, this position can serve only as a total ionizing dose source and cannot supply a compliant displacement damage environment. Threshold voltage shifts measured in BSS119N MOSFETs irradiated using each test casing correlate more strongly with thermal neutron fluence (R² = 0.94) than with the measured photon dose (R² = 0.46), and cadmium shielding that removes 97% of the thermal fluence also removes 42% of the threshold shift. These results indicate that thermal neutrons contribute ionizing dose local to the device that externally placed dosimetry does not register, and that spectrum-hardening practices intended to approximate a 1-MeV equivalent environment may discard a substantial portion of the dose a device actually receives.