Voltage-Dependent Ceramic Capacitors as a Source of Dynamic Error in SAR ADC Front Ends

Charge-Conserving Modeling, Simulation Pitfalls, and ENOB Degradation

Abstract

Multilayer ceramic capacitors based on Class II dielectrics, such as X7R and X5R, are widely used in compact analog front ends because they provide high capacitance density at low cost. However, their capacitance is not constant. It depends strongly on applied voltage, temperature, package size, dielectric formulation, and DC bias. In low-accuracy circuits this effect is often acceptable. In precision data acquisition systems, especially in front ends driving high-resolution SAR analog-to-digital converters, the same effect can become a significant source of deterministic nonlinear error.

This article examines how voltage-dependent capacitance can degrade the dynamic performance of an ADC input path. The focus is not merely on the loss of nominal capacitance under DC bias, but on the distortion mechanism created when a nonlinear capacitor is charged and discharged by a time-varying input signal. In a sample-and-hold system, the final voltage captured at the end of the acquisition interval can deviate from the ideal sampled value in an amplitude-dependent and history-dependent manner. This error appears in the digitized spectrum as harmonic distortion and reduces SINAD and ENOB.

A second topic is the modeling method itself. A nonlinear capacitor should be represented through a physically consistent charge-voltage relationship, Q(V), rather than through a naive time-step update of an instantaneous capacitance value C(V). Incorrect behavioral models may inject or remove charge numerically and can produce distortion components that are artifacts of the simulation rather than properties of the physical circuit. A charge-conserving formulation avoids this failure mode and allows the designer to estimate ADC degradation with better confidence.

Representative simulations show that distortion is most severe under large-signal operation and can peak near the transition band of the input RC network rather than at the highest signal frequency. For a 16-bit, 100 kS/s acquisition example using a 10 nF front-end capacitor and a 4.4 V peak-to-peak input signal biased at 2.5 V, an ideal linear capacitor preserves high dynamic performance, while X7R and X5R models can reduce the effective resolution by several bits. The practical conclusion is straightforward: Class II ceramic capacitors should not be used blindly in precision signal paths. If they must be used, their nonlinear behavior should be modeled with a charge-based method and verified against design margins.