Testing for a Dead-Time Threshold in Class-D Amplifer Distortion: An LTSpice Simulation Study

Abstract

Class-D Amplifiers create high power efficiency by rapidly switching their output between two supply rails, as long as the two switches are not conducting at the same time. If both were conducted at the same time, it would result in a short circuit known as shoot-through. To prevent this, an interval called dead-time is included between the switching transitions. Longer dead-time would generally increase total harmonic distortion (THD). This study hypothesized that THD would remain relatively flat at small dead-time values then rises sharply past a critical threshold, producing a nonlinear “knee.” A half-bridge Class-D output stage using IRFH5302D MOSFETs was simulated in LTSpice, with pulse-wdith modulation (PWM) generated by comparing a 1kHz audio signal against a 50 kHz triangle carrier. The circuit ran on 15V supply rails (+/-) and drove an LC output filter with an 8 Ω resistor load. Dead-time was swept from 5ns to 200ns in 5ns increments, resulting in 40 simulation runs, and THD at the filtered output was measured with LTSpice’s Fourier Analysis. THD stayed narrow with a range of 8.44% to 8.46% throughout the entire sweep, with no threshold behavior, making the hypothesis not supported. This suggests that the simplified model which used: an idealized gate drive, a limited dead-time range, and a fixed resistive load, is mostly resistant to any threshold that exists in the hardware. Further work should extend the dead-time range and include a realistic gate driver.