A Deterministic SIMD Accelerator for On-Chip Near-Field RIS Phase Computation

Abstract

Near-field reconfigurable intelligent surface (RIS) beam steering requires a range-dependent phase for every element, refreshed within the channel coherence time. Embedded RIS controllers largely bypass this computation through stored codebooks or learned models. This letter presents a deterministic 4-lane SIMD accelerator that computes the near-field range and 2- bit phase of each element directly from target coordinates, with no stored phase states or trained models. Each lane combines fixed- point distance computation, a 16-stage non-restoring square-root unit, and Binary Angular Measurement (BAM) quantization in a 22-cycle pipeline. A 256-element update takes 87 cycles (580 ns at 150 MHz) independent of target position, a 3.21× reduction over one lane. Post-route on a Zynq-7020, the design uses 2642 LUTs, 3086 FFs and 20 DSP48s, with an estimated 126 mW dynamic power and a +0.075-ns timing margin. Bit-exact verification over 212,992 phase states, semantic array-factor checks and closed- loop RTL co-simulation confirm correct operation. The update is 0.35% of a 167-μs coherence bound at 30 GHz.